OpenTTD Source: src/cpu.cpp Source File

OpenTTD Source 13.2.1

cpu.cpp
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1 /*
2 * This file is part of OpenTTD.
3 * OpenTTD is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, version 2.
4 * OpenTTD is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
5 * See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with OpenTTD. If not, see <http://www.gnu.org/licenses/>.
6 */
7
10 #include "stdafx.h"
11 #include "core/bitmath_func.hpp"
12
13 #include "safeguards.h"
14
15 #undef RDTSC_AVAILABLE
16
17 /* rdtsc for MSC_VER, uses simple inline assembly, or _rdtsc
18 * from external win64.asm because VS2005 does not support inline assembly */
19 #if defined(_MSC_VER) && !defined(RDTSC_AVAILABLE)
20 #include <intrin.h>
21 #include <windows.h>
22 uint64 ottd_rdtsc()
23 {
24 #if defined(_M_ARM)
25 return __rdpmccntr64();
26 #elif defined(_M_ARM64)
27 return _ReadStatusReg(ARM64_PMCCNTR_EL0);
28 #else
29 return __rdtsc();
30 #endif
31 }
32 #define RDTSC_AVAILABLE
33 #endif
34
35 /* rdtsc for OS/2. Hopefully this works, who knows */
36 #if defined (__WATCOMC__) && !defined(RDTSC_AVAILABLE)
37 unsigned __int64 ottd_rdtsc();
38 # pragma aux ottd_rdtsc = 0x0F 0x31 value [edx eax] parm nomemory modify exact [edx eax] nomemory;
39 # define RDTSC_AVAILABLE
40 #endif
41
42 /* rdtsc for all other *nix-en (hopefully). Use GCC syntax */
43 #if (defined(__i386__) || defined(__x86_64__)) && !defined(RDTSC_AVAILABLE)
44 uint64 ottd_rdtsc()
45 {
46 uint32 high, low;
47 __asm__ __volatile__ ("rdtsc" : "=a" (low), "=d" (high));
48 return ((uint64)high << 32) | low;
49 }
50 # define RDTSC_AVAILABLE
51 #endif
52
53 /* rdtsc for PPC which has this not */
54 #if (defined(__POWERPC__) || defined(__powerpc__)) && !defined(RDTSC_AVAILABLE)
55 uint64 ottd_rdtsc()
56 {
57 uint32 high = 0, high2 = 0, low;
58 /* PPC does not have rdtsc, so we cheat by reading the two 32-bit time-counters
59 * it has, 'Move From Time Base (Upper)'. Since these are two reads, in the
60 * very unlikely event that the lower part overflows to the upper part while we
61 * read it; we double-check and reread the registers */
62 asm volatile (
63 "mftbu %0\n"
64 "mftb %1\n"
65 "mftbu %2\n"
66 "cmpw %3,%4\n"
67 "bne- $-16\n"
68 : "=r" (high), "=r" (low), "=r" (high2)
69 : "0" (high), "2" (high2)
70 );
71 return ((uint64)high << 32) | low;
72 }
73 # define RDTSC_AVAILABLE
74 #endif
75
76 /* rdtsc for MCST Elbrus 2000 */
77 #if defined(__e2k__) && !defined(RDTSC_AVAILABLE)
78 uint64 ottd_rdtsc()
79 {
80 uint64_t dst;
81 # pragma asm_inline
82 asm("rrd %%clkr, %0" : "=r" (dst));
83 return dst;
84 }
85 # define RDTSC_AVAILABLE
86 #endif
87
88 #if defined(__EMSCRIPTEN__) && !defined(RDTSC_AVAILABLE)
89 /* On emscripten doing TIC/TOC would be ill-advised */
90 uint64 ottd_rdtsc() {return 0;}
91 # define RDTSC_AVAILABLE
92 #endif
93
94 /* In all other cases we have no support for rdtsc. No major issue,
95 * you just won't be able to profile your code with TIC()/TOC() */
96 #if !defined(RDTSC_AVAILABLE)
97 #warning "(non-fatal) No support for rdtsc(), you won't be able to profile with TIC/TOC"
98 uint64 ottd_rdtsc() {return 0;}
99 #endif
100
101
113 #if defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64))
114 void ottd_cpuid(int info[4], int type)
115 {
116 __cpuid(info, type);
117 }
118 #elif defined(__x86_64__) || defined(__i386)
119 void ottd_cpuid(int info[4], int type)
120 {
121 #if defined(__i386) && defined(__PIC__)
122 /* The easy variant would be just cpuid, however... ebx is being used by the GOT (Global Offset Table)
123 * in case of PIC;
124 * clobbering ebx is no alternative: some compiler versions don't like this
125 * and will issue an error message like
126 * "can't find a register in class 'BREG' while reloading 'asm'"
127 */
128 __asm__ __volatile__ (
129 "xchgl %%ebx, %1 \n\t"
130 "cpuid \n\t"
131 "xchgl %%ebx, %1 \n\t"
132 : "=a" (info[0]), "=r" (info[1]), "=c" (info[2]), "=d" (info[3])
133 /* It is safe to write "=r" for (info[1]) as in case that PIC is enabled for i386,
134 * the compiler will not choose EBX as target register (but something else).
135 */
136 : "a" (type)
137 );
138 #else
139 __asm__ __volatile__ (
140 "cpuid \n\t"
141 : "=a" (info[0]), "=b" (info[1]), "=c" (info[2]), "=d" (info[3])
142 : "a" (type)
143 );
144 #endif /* i386 PIC */
145 }
146 #elif defined(__e2k__) /* MCST Elbrus 2000*/
147 void ottd_cpuid(int info[4], int type)
148 {
149 info[0] = info[1] = info[2] = info[3] = 0;
150 if (type == 0) {
151 info[0] = 1;
152 } else if (type == 1) {
153 #if defined(__SSE4_1__)
154 info[2] |= (1<<19); /* HasCPUIDFlag(1, 2, 19) */
155 #endif
156 #if defined(__SSSE3__)
157 info[2] |= (1<<9); /* HasCPUIDFlag(1, 2, 9) */
158 #endif
159 #if defined(__SSE2__)
160 info[3] |= (1<<26); /* HasCPUIDFlag(1, 3, 26) */
161 #endif
162 }
163 }
164 #else
165 void ottd_cpuid(int info[4], int type)
166 {
167 info[0] = info[1] = info[2] = info[3] = 0;
168 }
169 #endif
170
171 bool HasCPUIDFlag(uint type, uint index, uint bit)
172 {
173 int cpu_info[4] = {-1};
174 ottd_cpuid(cpu_info, 0);
175 uint max_info_type = cpu_info[0];
176 if (max_info_type < type) return false;
177
178 ottd_cpuid(cpu_info, type);
179 return HasBit(cpu_info[index], bit);
180 }
ottd_cpuid
void ottd_cpuid(int info[4], int type)
Definitions for CPU detection:
Definition: cpu.cpp:165
HasBit
static bool HasBit(const T x, const uint8 y)
Checks if a bit in a value is set.
Definition: bitmath_func.hpp:103
bitmath_func.hpp
safeguards.h
stdafx.h
ottd_rdtsc
uint64 ottd_rdtsc()
Get the tick counter from the CPU (high precision timing).
Definition: cpu.cpp:98
HasCPUIDFlag
bool HasCPUIDFlag(uint type, uint index, uint bit)
Check whether the current CPU has the given flag.
Definition: cpu.cpp:171